The present invention relates to such a semiconductor data processing device as a data processor, etc., for example, a bridge semiconductor data processing device for connecting a non-volatile storage device to a general-purpose bus of a host system, more particularly to a technique to be applied effectively to a bridge circuit for connecting a memory card to a general-purpose bus of a personal computer (PC).
There have been various methods disclosed so far to reduce power consumption of semiconductor integrated circuits. One of such methods is to control the on/off state of a synchronization clock according to the operation state of the subject integrated circuit (patent document 1) and another is to reduce wasteful power consumption to be caused by a sub-threshold leak by adjusting the substrate bias voltage according to whether or not the integrated circuit stands by (patent document 2).    [Patent Document 1]    Japanese Unexamined Patent Publication No. Hei 11(1999)-145897    [Patent Document 2]    Japanese Unexamined Patent Publication No. Hei 9(1997)-83335